This book uses a "learn by doing" approach to introduce the concepts and techniques of VHDL and FPGA to designers through a series of hands-on experiments. FPGA Prototyping by VHDL Examples provides a collection of clear, easy-to-follow templates for quick code development; a large number of practical examples to illustrate and reinforce the concepts and design techniques; realistic projects that can be implemented and tested on a Xilinx prototyping board; and a thorough exploration of the Xilinx PicoBlaze soft-core microcontroller.
INDICE
12.6.11 Full-screen mouse scribble circuit. 13. VGA controller II: text. 13.1 Introduction. 13.2 Text generation. 13.2.1 Character as tile. 13.2.2 Font ROM. 13.2.3 Basic text generation circuit. 13.2.4 Font display circuit. 13.2.5 Font scaling. 13.3 Full-screen text display. 13.4 The complete pong game. 13.4.1 Text subsystem. 13.4.2 Modified graphic subsystem. 13.4.3 Auxiliary counters. 13.4.4 Top-level system. 13.5 Bibliographic notes. 13.6 Suggested experiments. 13.6.1 Rotating banner. 13.6.2 Underline for cursor. 13.6.3 Dual-mode text display. 13.6.4 Keyboard text entry. 13.6.5 UART terminal. 13.6.6 Square wave display. 13.6.7 Simple four-trace logic analyzer. 13.6.8 Complete two-player pong game. 13.6.9 Complete breakout game. PART III: PICOBLAZE MICROCONTROLLERXILINX SPECIFIC. 14. PicoBlaze Overview. 14.1 Introduction. 14.2 Customized hardware and customized software. 14.2.1 From special-purpose FSMD to general-purpose microcontroller. 14.2.2 Application of microcontroller. 14.3 Overview of PicoBlaze. 14.3.1 Basic organization. 14.3.2 Top-level HDL modules. 14.4 Development flow. 14.5 Instruction set. 14.5.1 Programming model. 14.5.2 Instruction format. 14.5.3 Logical instructions. 14.5.4 Arithmetic instructions. 14.5.5 Compare and test instructions. 14.5.6 Shift and rotate instructions. 14.5.7 Data movement instructions. 14.5.8 Program flow control instructions. 14.5.9 Interrupt related instructions. 14.6 Assembler directives. 14.6.1 The KCPSM3 directives. 14.6.2 The PBlazeIDE directives. 14.7 Bibliographic notes 343. 14.8 Suggested experiments 343. 15. PicoBlaze Assembly Code Development. 15.1 Introduction. 15.2 Useful code segments. 15.2.1 KCPSM3 conventions. 15.2.2 Bit manipulation. 15.2.3 Multiple-byte manipulation. 15.2.4 Control structure. 15.3 Subroutine development. 15.4 Program development. 15.4.1 Demonstration example. 15.4.2 Program documentation. 15.5 Processing of assembly code. 15.5.1 Compiling with KCSPM3. 15.5.2 Simulation by PBlazeIDE. 15.5.3 Reload code via JTAG port. 15.5.4 Compiling by PBlazeIDE. 15.6 Syntheses with PicoBlaze. 15.7 Bibliographic notes. 15.8 Suggested experiments. 15.8.1 Signed multiplication. 15.8.2 Multi-bytes multiplication. 15.8.3 Barrel shift function. 15.8.4 Reverse function. 15.8.5 Binary-to-BCD conversion. 15.8.6 BCD-to-binary conversion. 15.8.7 Heartbeat circuit. 15.8.8 Rotating LED circuit. 15.8.9 Discrete LED dimmer. 16. PicoBlaze I/O Interface. 16.1 Overview. 16.2 Output port. 16.2.1 Output instruction and timing. 16.2.2 Output interface. 16.3 Input port. 16.3.1 Input instruction and timing. 16.3.2 Input interface. 16.4 Square program with switch and seven-segment LED display interface. 16.4.1 Output interface. 16.4.2 Input interface. 16.4.3 Assembly code development. 16.4.4 VHDL code development. 16.5 Square program with combinational multiplier and UART console. 16.5.1 Multiplier interface. 16.5.2 UART interface. 16.5.3 Assembly code development. 16.5.4 VHDL code development. 16.6 Bibliographic notes. 16.7 Suggested experiments. 16.7.1 Low-frequency counter I. 16.7.2 Low frequency counter II. 16.7.3 Auto-scaled low-frequency counter. 16.7.4 Basic reaction timer with software timer. 16.7.5 Basic reaction timer with hardware timer. 16.7.6 Enhanced reaction timer. 16.7.7 Small-screen mouse scribble circuit. 16.7.8 Full-screen mouse scribble circuit. 16.7.9 Enhanced rotating banner. 16.7.10 Pong game. 16.7.11 Text editor. 17. PicoBlaze Interrupt Interface. 17.1 Overview. 17.2 Interrupt handling in PicoBlaze. 17.2.1 Software processing. 17.2.2 Timing. 17.3 External interface. 17.3.1 Single interrupt request. 17.3.2 Multiple interrupt requests. 17.4 Software development considerations. 17.4.1 Interrupt as alternative scheduling scheme. 17.4.2 Development of interrupt service routine. 17.5 Design example. 17.5.1 interrupt interface. 17.5.2 Interrupt service routine development. 17.5.3 Assembly code development. 17.5.4 VHDL code development. 17.6 Bibliographic notes. 17.7 Suggested experiments. 17.7.1 Alternative timer interrupt service routine. 17.7.2 Programmable timer. 17.7.3 Set-button interrupt service routine. 17.7.4 Interrupt interface with two requests. 17.7.5 Four-request interrupt controller. Appendix A: Sample VHDL templates. A.1 General VHDL constructs. A.1.1 Overall code structure. A.1.2 Component instantiation. A.2 Combinational circuits. A.2.1 Arithmetic operations. A.2.2 Fixed-amount shift operations. A.2.3 Routing with concurrent statements. A.2.4 Routing with case and if statements. A.2.5 Combinational circuit using process. A.3 Memory Components. A.3.1 Register template. A.3.2 Register file. A.4 Regular sequential circuits. A.5 FSM. A.6 FSMD. A.7 S3 board constraint file (s3.ucf). References.
